module flow (
        input sys_clk,
        input sys_rst_n,
        output reg [1:0] flow_out
    );

    // 每0.5s反转一次, 需要根据系统时钟频率计算翻转计数
    parameter FlipCount = 32'd25_000_000-32'd1; // 系统时钟为50MHz

    // 计数器
    reg [31:0] cnt;

    // 计时
    always @(posedge sys_clk or negedge sys_rst_n) begin
        if (!sys_rst_n) begin
            cnt<=32'd0;
        end
        else begin
            cnt <= (cnt >= FlipCount) ? 32'd0 : cnt + 1;
        end
    end

    always @(negedge sys_rst_n or posedge sys_clk) begin
        if (!sys_rst_n) begin
            flow_out <= 2'b01;
        end
        else if (cnt>=FlipCount) begin
            flow_out <= {flow_out[0], flow_out[1]};
        end
        else begin
            flow_out <= flow_out;
        end
    end

endmodule

